Aaru Report for WDC WD2000JD-00HBB0 08.02D08

ATA characteristics:
ATA device
Model: WDC WD2000JD-00HBB0
Firmware revision: 08.02D08
Supported ATA versions: ATA-1 ATA-2 ATA-3 ATA/ATAPI-4 ATA/ATAPI-5 ATA/ATAPI-6
Maximum ATA revision supported: Minor ATA version not specified
Parallel ATA device:
PIO timing mode: 2
Advanced PIO: PIO0 PIO1
Multi-word DMA: MDMA0 MDMA1 MDMA2
Ultra DMA: UDMA0 UDMA1 UDMA2 UDMA3 UDMA4 UDMA5 UDMA6 (active)
Logical sector size: 512 bytes
READ LONG sector size: 586 bytes
Cylinders: 16383 max., 16383 current
Heads: 16 max., 16 current
Sectors per track: 63 max., 63 current
Sectors addressable in CHS mode: 16514064 max., 16514064 current
Device size in CHS mode: 8455200768 bytes, 8455 Mb, 8063.51 MiB
Sectors addressable in sectors in 28-bit LBA mode: 268435455
Device size in 28-bit LBA mode: 137438952960 bytes, 137 Gb, 128.00 GiB
Sectors addressable in sectors in 48-bit LBA mode: 390721968
Device size in 48-bit LBA mode: 200049647616 bytes, 200 Gb, 186.31 GiB
Bytes per unformatted track: 57600
Bytes per unformatted sector: 600

Device is fixed
Device transfer rate is > 5 Mb/s but <= 10 Mb/s
Device is hard sectored
Device is not MFM encoded
Format speed tolerance gap is required
Spindle motor control is implemented
Head switch time is bigger than 15 µs.
0 KiB of dual ported multi sector buffer with read caching
Device capabilities:
Standby time values are standard
IORDY is supported and can be disabled
DMA is supported
Device indicates a specific minimum standby timer value
A maximum of 16 sectors can be transferred per interrupt on READ/WRITE MULTIPLE
Device supports setting a maximum of 16 sectors
At minimum 120 ns. transfer cycle time per word in MDMA, 120 ns. recommended
At minimum 120 ns. transfer cycle time per word in PIO, without flow control
At minimum 120 ns. transfer cycle time per word in PIO, with IORDY flow control
Command set and features:
READ BUFFER is supported and enabled
WRITE BUFFER is supported and enabled
Host Protected Area is supported and enabled
Look-ahead read is supported and enabled
Write cache is supported and enabled
Power management is supported and enabled
Security mode is supported
28-bit LBA is supported
48-bit LBA is supported and enabled
FLUSH CACHE is supported and enabled
FLUSH CACHE EXT is supported and enabled
Device Configuration Overlay feature set is supported and enabled
Automatic Acoustic Management is supported
SET MAX security extension is supported
SET FEATURES is required before spin-up
Power-up in standby is supported
DOWNLOAD MICROCODE is supported and enabled
S.M.A.R.T. is supported
S.M.A.R.T. Command Transport is supported
S.M.A.R.T. self-testing is supported and enabled
S.M.A.R.T. error logging is supported and enabled
Security:
Security is not enabled
0 minutes to complete secure erase
Master password revision code: 0
S.M.A.R.T. Command Transport (SCT):
SCT Long Sector Address is supported
SCT Write Same is supported
SCT Error Recovery Control is supported
SCT Features Control is supported
SCT Data Tables are supported

Device supports READ SECTOR(S) command in CHS mode
Device supports READ SECTOR(S) RETRY command in CHS mode
Device supports READ DMA command in CHS mode
Device supports READ DMA RETRY command in CHS mode
Device supports READ LONG command in CHS mode
Device supports READ SECTOR(S) command in 28-bit LBA mode
Device supports READ SECTOR(S) RETRY command in 28-bit LBA mode
Device supports READ DMA command in 28-bit LBA mode
Device supports READ DMA RETRY command in 28-bit LBA mode
Device supports READ LONG command in 28-bit LBA mode
Device supports READ SECTOR(S) command in 48-bit LBA mode
Device supports READ DMA command in 48-bit LBA mode
Device supports SEEK command in CHS mode
Device supports SEEK command in 28-bit LBA mode